Signal mixing PIC18F452

Signal mixing PIC18F452

Postby SMD Footprint » Thu Feb 21, 2019 4:50 am

i've been using MPLAB v8.92 and PIC18F452 with all 8 A/D channels enabled.
I get somewhat useful data but when one channel change a portion of the change end up in the other channels, both in the result i read out of the micro and on multimeters on the pins.

I have tried delaying the start of the conversion and setting the A/D channel using a hex switch similar to this one:
https://uk.farnell.com/apem/pt65-103/sw ... x%20switch
that way i read just one channel until i change the hex swich but still the channels get some level of mixing, up to about 5%

Any ideas of how to get around the problem?
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Re: Signal mixing PIC18F452

Postby Roche » Thu Feb 21, 2019 10:37 am

Maybe look at the impedance of the drive into the A/D - perhaps include a op amp buffer.
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Re: Signal mixing PIC18F452

Postby SMD Footprint » Fri Feb 22, 2019 2:10 am

I did some more testing and found more power going in than expected.
Looked some more at the code and realized i had made an error in my coding causing 4 bits of the value from the hex switch to end up in the wrong place of ADCON0 causing it to turn on and off.

After fixing the code problem i found something i found to be odd.
Even when i place nothing but a 10K resistor to AN1 and rising AN0 to 5V, the AN1 pin rise from 0,00 to 0,04 but not when rising any of the other channels.
At the same time a condition is that i read AN0, if i start reading AN2 the AN1 falls back to 0,00


However as a temporary solution i decided to use more chips for now since i have the chips.
One chip/microcontroller per channel.

I hope i'll be able to sort out the problem somehow.
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Re: Signal mixing PIC18F452

Postby ric » Fri Feb 22, 2019 8:38 am

Can you show your code?
This sounds like insufficient "acquisition time".
Latest test project, an LED matrix display made from one reel of addressable LEDs. here
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Re: Signal mixing PIC18F452

Postby SMD Footprint » Sat Feb 23, 2019 3:04 pm

Yes, code is supplied.
Now i regret making half the comments in swedish, if they was in english i could just zip the whole thing it if anyone felt like testing the code.

Most is just a description of ADCON0 and ADCON1.
Scroll to the bottom for the actual code.
Code: Select all
Global SetupAD_converters
SetupAD_converters


;===============================================================
;                  Setup ADCON0 och ADCON1
;===============================================================

;                           ADCON0                                                               ADCON1
;   bit 7                                                   bit 0        bit 7                                               bit 0
; -----------------------------------------------------------------    -------------------------------------------------------------
; | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0   | U-0 | R/W-0 |    | R/W-0 | R/W-0 | U-0 | U-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
; | ADCS1 | ADCS0 | CHS2  | CHS1  | CHS0  | GO/DONE |  —  | ADON  |    | ADFM  | ADCS2 |  —  |  —  | PCFG3 | PCFG2 | PCFG1 | PCFG0 |           
; -----------------------------------------------------------------    -------------------------------------------------------------

; W W W W W W W W W W   *** ADCON0 ***
; W
; W  bit 7-6 ADCS1:ADCS0: A/D Conversion Clock Select bits (ADCON0 bits in bold)
; W  ADCON1        ADCON0
; W  <ADCS2>   <ADCS1:ADCS0> 
; W     0           0:0 FOSC/2
; W     0           0:1 FOSC/8
; W     0           1:0 FOSC/32
; W     0           1:1 FRC (clock derived from the internal A/D RC oscillator)
; W     1           0:0 FOSC/4
; W     1           0:1 FOSC/16
; W     1           1:0 FOSC/64
; W     1           1:1 FRC (clock derived from the internal A/D RC oscillator)
; W   
; W  bit 5-3 CHS2:CHS0: Analog Channel Select bits
; W  000 = channel 0, (AN0)
; W  001 = channel 1, (AN1)
; W  010 = channel 2, (AN2)
; W  011 = channel 3, (AN3)
; W  100 = channel 4, (AN4)
; W  101 = channel 5, (AN5)
; W  110 = channel 6, (AN6)
; W  111 = channel 7, (AN7)
; W 
; W  bit 2 GO/DONE: A/D Conversion Status bit
; W  When ADON = 1:
; W  1 = A/D conversion in progress (setting this bit starts the A/D conversion which is automatically
; W  cleared by hardware when the A/D conversion is complete)
; W  0 = A/D conversion not in progress
; W   
; W  bit 1 Unimplemented: Read as '0'
; W   
; W  bit 0 ADON: A/D On bit
; W  1 = A/D converter module is powered up
; W  0 = A/D converter module is shut-off and consumes no operating current
; W   
; W  Legend:
; W  R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
; W  - n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown


; W W W W W W W W W W   *** ADCON1 ***
; W
; W  bit 7 ADFM: A/D Result Format Select bit
; W  1 = Right justified. Six (6) Most Significant bits of ADRESH are read as ’0’.
; W  0 = Left justified. Six (6) Least Significant bits of ADRESL are read as ’0’.
; W     
; W  bit 6 ADCS2: A/D Conversion Clock Select bit (ADCON1 bits in bold)
; W   
; W                           ADCON0                                                               ADCON1
; W    bit 7                                                   bit 0        bit 7                                               bit 0
; W  -----------------------------------------------------------------    -------------------------------------------------------------
; W  | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0   | U-0 | R/W-0 |    | R/W-0 | R/W-0 | U-0 | U-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
; W  | ADCS1 | ADCS0 | CHS2  | CHS1  | CHS0  | GO/DONE |  —  | ADON  |    | ADFM  | ADCS2 |  —  |  —  | PCFG3 | PCFG2 | PCFG1 | PCFG0 |           
; W  -----------------------------------------------------------------    -------------------------------------------------------------
; W      .       .                                                                    .
; W     /|\     /|\                                                                  /|\             
; W    / | \   / | \                                                                / | \             
; W      |       |                                                                    |             
; W      |       |                                                                    |             
; W  Clock Conversion
; W  ADCON1        ADCON0
; W  <ADCS2>   <ADCS1:ADCS0> 
; W     0           0:0 FOSC/2
; W     0           0:1 FOSC/8
; W     0           1:0 FOSC/32
; W     0           1:1 FRC (clock derived from the internal A/D RC oscillator)
; W     1           0:0 FOSC/4
; W     1           0:1 FOSC/16
; W     1           1:0 FOSC/64
; W     1           1:1 FRC (clock derived from the internal A/D RC oscillator)
; W   
; W  bit 5-4 Unimplemented: Read as '0'
; W   
; W  bit 3-0 PCFG3:PCFG0: A/D Port Configuration Control bits
; W  PCFG
; W  <3:0> AN7 AN6 AN5 AN4 AN3   AN2 AN1 AN0 VREF+ VREF- C / R
; W  0000   A   A   A   A   A     A   A   A   VDD   VSS  8 / 0
; W  0001   A   A   A   A VREF+   A   A   A   AN3   VSS  7 / 1
; W  0010   D   D   D   A   A     A   A   A   VDD   VSS  5 / 0
; W  0011   D   D   D   A VREF+   A   A   A   AN3   VSS  4 / 1
; W  0100   D   D   D   D   A     D   A   A   VDD   VSS  3 / 0
; W  0101   D   D   D   D VREF+   D   A   A   AN3   VSS  2 / 1
; W  011x   D   D   D   D   D     D   D   D    —     —   0 / 0
; W  1000   A   A   A   A VREF+ VREF- A   A   AN3   AN2  6 / 2
; W  1001   D   D   A   A   A     A   A   A   VDD   VSS  6 / 0
; W  1010   D   D   A   A VREF+   A   A   A   AN3   VSS  5 / 1
; W  1011 D D A AVREF+ VREF- A A AN3 AN2 4 / 2
; W  1100 D D D AVREF+ VREF- A A AN3 AN2 3 / 2
; W  1101 D D D DVREF+ VREF- A A AN3 AN2 2 / 2
; W  1110 DDDD D D DAVDD VSS 1 / 0
; W  1111 D D D DVREF+ VREF- D A AN3 AN2 1 / 2     
; W    A = Analog input D = Digital I/O
; W    C/R = # of analog input channels / # of A/D voltage references


;• Configure analog pins, voltage reference and
;digital I/O (ADCON1)
;• Select A/D input channel (ADCON0)
;• Select A/D conversion clock (ADCON0)
;• Turn on A/D module (ADCON0)

;   bit 7                                                   bit 0        bit 7                                               bit 0
; -----------------------------------------------------------------    -------------------------------------------------------------
; | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0   | U-0 | R/W-0 |    | R/W-0 | R/W-0 | U-0 | U-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
; | ADCS1 | ADCS0 | CHS2  | CHS1  | CHS0  | GO/DONE |  —  | ADON  |    | ADFM  | ADCS2 |  —  |  —  | PCFG3 | PCFG2 | PCFG1 | PCFG0 |           
; -----------------------------------------------------------------    -------------------------------------------------------------

 movlw B'11000000'  ;   N alla bits skjutan åt höger, de sex MSb läses som nollor, FOSC/64
 movwf ADCON1       ;   N All bits are shifted to the right, the six MSb are read as zeroes, FOSC/64
 movlw B'10000000'  ; T FOSC/64
 movwf ADCON0       ; T
 movlw B'10000001'  ; T Starta A/D modulen
 movwf ADCON0       ; T Start A/D module
 movlw B'10000101'  ; T här startas A/D omvandlingen i bit 2 av 7
 movwf ADCON0       ; T This is where A/D conversion is started, bit 2 of 7

;**************************** SLUT / END *****************************

 return


This is the code using the A/D
Code: Select all

;==========================================================================
;        Read and store the AD, start new conversion
;==========================================================================
Global ReadNextAD_converter
ReadNextAD_converter
  ; MIGHT NEED A CAP AT THE MEASURING PIN
 btfsc ADCON0, GO_DONE ; M  Continue doing other things if the conversion
 return                ; M  are still going on

 ; något för testning
btfsc DisableDebugRoutines, 0                    ; W  tabort
bra $ + D'4'                                     ; W  tabort
Call CopyFikitivaResultatSåDeKanBliÅterplacerade ; W  tabort
   
 
; Store value in ADRES from the A/D converter
; I know, could be made using a loop
 lfsr 0, ConverterResultToStore
 
 movlw 0x00
 cpfseq ConverterInLineToBeRead
 bra $ + 0x0C
 movff ADRESH, POSTINC0
 movff ADRESL, POSTINC0
 incf ConverterResultToStoreSelector
 cpfseq ConverterInLineToBeRead
 bra $ + 4
 bra $ + 6
 MOVF POSTINC0, 1
 MOVF POSTINC0, 1
 
 incf WREG
 cpfseq ConverterInLineToBeRead
 bra $ + 0x0C
 movff ADRESH, POSTINC0
 movff ADRESL, POSTINC0
 incf ConverterResultToStoreSelector
 cpfseq ConverterInLineToBeRead
 bra $ + 4
 bra $ + 6
 MOVF POSTINC0, 1
 MOVF POSTINC0, 1

 incf WREG
 cpfseq ConverterInLineToBeRead
 bra $ + 0x0C
 movff ADRESH, POSTINC0
 movff ADRESL, POSTINC0
 incf ConverterResultToStoreSelector
 cpfseq ConverterInLineToBeRead
 bra $ + 4
 bra $ + 6
 MOVF POSTINC0, 1
 MOVF POSTINC0, 1

 incf WREG
 cpfseq ConverterInLineToBeRead
 bra $ + 0x0C
 movff ADRESH, POSTINC0
 movff ADRESL, POSTINC0
 incf ConverterResultToStoreSelector
 cpfseq ConverterInLineToBeRead
 bra $ + 4
 bra $ + 6
 MOVF POSTINC0, 1
 MOVF POSTINC0, 1

 incf WREG
 cpfseq ConverterInLineToBeRead
 bra $ + 0x0C
 movff ADRESH, POSTINC0
 movff ADRESL, POSTINC0
 incf ConverterResultToStoreSelector
 cpfseq ConverterInLineToBeRead
 bra $ + 4
 bra $ + 6
 MOVF POSTINC0, 1
 MOVF POSTINC0, 1

 incf WREG
 cpfseq ConverterInLineToBeRead
 bra $ + 0x0C
 movff ADRESH, POSTINC0
 movff ADRESL, POSTINC0
 incf ConverterResultToStoreSelector
 cpfseq ConverterInLineToBeRead
 bra $ + 4
 bra $ + 6
 MOVF POSTINC0, 1
 MOVF POSTINC0, 1

 incf WREG
 cpfseq ConverterInLineToBeRead
 bra $ + 0x0C
 movff ADRESH, POSTINC0
 movff ADRESL, POSTINC0
 incf ConverterResultToStoreSelector
 cpfseq ConverterInLineToBeRead
 bra $ + 4
 bra $ + 6
 MOVF POSTINC0, 1
 MOVF POSTINC0, 1

 incf WREG
 cpfseq ConverterInLineToBeRead
 bra $ + 0x0C
 movff ADRESH, POSTINC0
 movff ADRESL, POSTINC0
 incf ConverterResultToStoreSelector
 cpfseq ConverterInLineToBeRead
 bra $ + 4
 bra $ + 6
 MOVF POSTINC0, 1
 MOVF POSTINC0, 1


 ; If the selector/counter of wich AD converter to use has hit the roof
 ; then reset the selector/counter
 incf ConverterInLineToBeRead
 movff NumberOfConvertersToBeUsed, WREG
 cpfsgt ConverterInLineToBeRead
 bra SkipAhead2 ; $ + 6
 clrf ConverterInLineToBeRead
 bsf AllSensorsAreRead, 0
 Call SändUtADResultatetTillLysdiååååder ; tabort



SkipAhead2
 
 ; Put the selection of what AD should be used next into ADCON0
 movff ConverterInLineToBeRead, WREG
 rlncf WREG
 rlncf WREG
 rlncf WREG
 bcf ADCON0, CHS0 
 bcf ADCON0, CHS1
 bcf ADCON0, CHS2
 addwf ADCON0
 ; Done
 
 bsf ADCON0, GO_DONE  ; Start new conversion to read the voltage level
                      ; of a new pin
 
 btfsc DisableDebugRoutines, 0         ; W tabort
 bra $ + D'4'                          ; W tabort
 Call ÅterplaceraFiktivaResultat       ; W tabort
 
 return

;************************ SLUT / END ************************
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Re: Signal mixing PIC18F452

Postby SMD Footprint » Sat Feb 23, 2019 5:34 pm

Problem solved, thanks you sent me down the right path :)
The problem was i had misunderstood the acquisition time.
I thought acquisition started at the line "bsf ADCON0, GO_DONE" but that's just the conversion, i didn't know that before.
Now i added some 300 "nop" before starting the conversion.

For a permanent fix i'll rearrange the code instead of the "nop"s :D
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