I would like to make an interruption with a push button and an LED. I do not have much control over interruptions. Here is my current code but the problem is that my push button does not work when I make a support. On the other hand, the LED remains on. Thank you in advance !
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// CONFIG1
#pragma config FEXTOSC = OFF // FEXTOSC External Oscillator mode Selection bits (Oscillator not enabled)
#pragma config RSTOSC = HFINT1 // Power-up default value for COSC bits (HFINTOSC with 2x PLL (32MHz))
#pragma config CLKOUTEN = OFF // Clock Out Enable bit (CLKOUT function is enabled; FOSC/4 clock appears at OSC2)
#pragma config CSWEN = ON // Clock Switch Enable bit (Writing to NOSC and NDIV is allowed)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable (Fail-Safe Clock Monitor is disabled)
// CONFIG2
#pragma config MCLRE = ON // Master Clear Enable bit (MCLR/VPP pin function is MCLR; Weak pull-up enabled)
#pragma config PWRTE = OFF // Power-up Timer Enable bit (PWRT disabled)
#pragma config WDTE = OFF // Watchdog Timer Enable bits (WDT disabled; SWDTEN is ignored)
#pragma config LPBOREN = OFF // Low-power BOR enable bit (ULPBOR disabled)
#pragma config BOREN = SBOREN // Brown-out Reset Enable bits (Brown-out Reset enabled according to SBOREN)
#pragma config BORV = LOW // Brown-out Reset Voltage selection bit (Brown-out voltage (Vbor) set to 2.45V)
#pragma config PPS1WAY = OFF // PPSLOCK bit One-Way Set Enable bit (The PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence))
#pragma config STVREN = OFF // Stack Overflow/Underflow Reset Enable bit (Stack Overflow or Underflow will not cause a Reset)
#pragma config DEBUG = OFF // Debugger enable bit (Background debugger disabled)
// CONFIG3
#pragma config WRT = OFF // User NVM self-write protection bits (Write protection off)
#pragma config LVP = ON // Low Voltage Programming Enable bit (Low Voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored.)
// CONFIG4
#pragma config CP = OFF // User NVM Program Memory Code Protection bit (User NVM code protection disabled)
#pragma config CPD = OFF // Data NVM Memory Code Protection bit (Data NVM code protection disabled)
// PORT A
#define ICSPDAT RA0 // Port de programmation
#define POWER RA1 // Retour d etat charge batterie
#define MCLR RA3 // Port de programmation
#define Vactiv RA5 // Grille transistor ventilateur
// PORT B
#define ledR RB7 // +LED rouge
// PORT C
#define BP RC5 // Bouton poussoir
/*#define ON 0 // Led tirée au +VCC
#define OFF 1 // Led tiréé au gnd*/
//#define _XTAL_FREQ 8000000 // Oscillateur réglé à 8MHz
#include <xc.h>
int count = 0;
void interrupt Interrupt_bp (void)
{
if(( PIE0bits.IOCIE ) && (PIR0bits.IOCIF))
PIR0bits.IOCIF = 1;
PIR0bits.TMR0IF = 0; // RAZ flag IT
count++;
if (count==76){
count = 0;
ledR = ~ledR;
}
}
void main(void)
{
// Reglages des entrees/sorties
TRISA = 0b00001011; // Choix entrees/sorties
LATA = 0b00000000; // RAZ des ports
ANSELA = 0b00000000; // Choix mode analogique/numerique
WPUA = 0b00000010; // Resistances de pull-up interne
TRISB = 0b00000000; // Choix entrees/sorties
LATB = 0b10000000; // RAZ des ports
ANSELB = 0b00000000; // Choix mode analogique/numerique
WPUB = 0b00000000; // Resistances de pull-up interne
TRISC = 0b00100000; // Choix entrees/sorties
LATC = 0b11000000;; // RAZ des ports
ANSELC = 0b000110000; // Choix mode analogique/numerique
WPUC = 0b00100000; // Resistances de pull-up interne
//Reglage des interuptions
INTCONbits.GIE = 1; // Valide les interruptions generales
INTCONbits.PEIE = 1; // Valide les interruptions peripheriques
INTCONbits.INTEDG = 0; // Interruption sur un front descendant
//Reglage des peripheriques
PIE0bits.TMR0IE = 1; // Valide l'interruption generee par le debordement du Timer0
PIE0bits.IOCIE = 1; // Valide le changement d'etat
PIE0bits.INTE = 1; // Autoise l'interruption sur un peripherique exterieur
PIR0bits.TMR0IF = 0; // RAZ flag IT
PIR0bits.IOCIF = 1; // Activation du front descendant
PIR0bits.INTF = 1; // Detection d'une interruption
while (1){
}
}