It's of course mostly academic but...
![Smile :)](./images/smilies/icon_e_smile.gif)
The point was: implementing a software 32bit CPU on a PIC16. I wanted to maintain retro-compatibility and add some instruction that could deal with 32bit operations, but...
looks like *all* of the 14bit opcodes have been exploited - in the Enhanced cores!
So... I started out implementing a C version of the standard/enhanced core, and this is attached. It's written in XC8 and is mostly functional: only needs some adjustment. And, of course, the point is that, being written in C, you can't "play" with real registers - while my aim was *using* the real FSR etc. But this is left for the future...
XC8 free mode takes circa 2000 words on a PIC16F18324 and such. If anybody wants to compile in Pro mode, just to check...
![Smile :)](./images/smilies/icon_e_smile.gif)
Then, I decided to move to 2-words opcodes, and in order to maintain retro-compatibility I decided to:
1st word: higher 6bits are 0 for an "old" instruction and 1 for "new" ones;
low byte contains the previous high 6bits for an old opcode, or newly defined ones
2nd word: if this is an "old" instruction, its 8bits are the low 8bits from a standard opcode
otherwise this is a new instruction.
New instruction at the moment include all operations available on a 32bits W register, plus all File operations as well; bit operations only on single byte (legacy mode) so far.
Full GOTOs coming soon!
Enjoy.