most buzy for this 3 weeks but this days I got around to program this a bit. My pic I2C comunicate with LCD
http://i.imgur.com/92WmEur.jpgbut I have a problem, I dont understand this LCD what do he want from me. From manual at page 10, lets take DISPLAY ON/OFF for example:
MOV I2C_DATA,#0CH ; Display ON/OFF
LCALL WRITE_CODE
At page 10 this code dont tell much.
But also at page 24 is a bit more data, DISPLAY could be 0b00001111 with all the ON/OFF seting, cursor, blinking. Same goes for every comand there at page 10. My problem is I dont understand if for every command I need to give him #00H first? (as possibile says in page 10) or just one #00H at begining. The order of this commands is good?
Also I dont get how to display text after I'm done with setting of the LCD. My Progress so far if I look verry patiently at the LCD some times I see the cursor blink for a split second. This is the code:
- Code: Select all
#include <xc.h>
#include <stdlib.h>
#include <stdio.h>
#include <i2c.h>
#pragma config PLLDIV = 1 // PLL Prescaler Selection bits (No prescale (4 MHz oscillator input drives PLL directly))
#pragma config CPUDIV = OSC1_PLL2// System Clock Postscaler Selection bits ([Primary Oscillator Src: /1][96 MHz PLL Src: /2])
#pragma config USBDIV = 1 // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes directly from the primary oscillator block with no postscale)
#pragma config FOSC = HS // Oscillator Selection bits (HS oscillator (HS))
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
#pragma config PWRT = OFF // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOR = ON // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
#pragma config BORV = 3 // Brown-out Reset Voltage bits (Minimum setting)
#pragma config VREGEN = OFF // USB Voltage Regulator Enable bit (USB voltage regulator disabled)
#pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)
#pragma config CCP2MX = ON // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = ON // PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset)
#pragma config LPT1OSC = OFF // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)
#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
#pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) is not code-protected)
#pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) is not code-protected)
#pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) is not code-protected)
#pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) is not code-protected)
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) is not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM is not code-protected)
#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh) is not write-protected)
#pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) is not write-protected)
#pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) is not write-protected)
#pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) is not write-protected)
#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) are not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block (000000-0007FFh) is not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM is not write-protected)
#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) is not protected from table reads executed in other blocks)
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) is not protected from table reads executed in other blocks)
#define _XTAL_FREQ 20000000
unsigned char error;
void init_I2C(){
SSPSTAT=0b10000000;
SSPCON1=0b00101000;
SSPCON2bits.GCEN=0;
SSPADD=49; //100Khz= 20000000/(4 * (SSPADD + 1))
}
void main(void){
ADCON1=0b00001111;
TRISBbits.RB0=1;
TRISBbits.RB1=1;
init_I2C();
while (1){
SSPCON2bits.SEN=1;
while (SSPCON2bits.SEN); //wait for start seq to finish
SSPBUF=0b01111100; //device address + write
if (SSPCON1bits.WCOL) goto stop;
while(SSPSTATbits.BF); //wait until write cycle is complete
while ((SSPCON2 & 0x1F) | (SSPSTATbits.R_nW)); //wait MSSP idle
while(!PIR1bits.SSPIF);
if(SSPCON2bits.ACKSTAT) goto stop;
SSPBUF=0x00;
if (SSPCON1bits.WCOL) goto stop;
while(SSPSTATbits.BF); //wait until write cycle is complete
while ((SSPCON2 & 0x1F) | (SSPSTATbits.R_nW)); //wait MSSP idle
while(!PIR1bits.SSPIF);
if(SSPCON2bits.ACKSTAT) goto stop;
SSPBUF=0x38; //38H
if (SSPCON1bits.WCOL) goto stop;
while(SSPSTATbits.BF); //wait until write cycle is complete
while ((SSPCON2 & 0x1F) | (SSPSTATbits.R_nW)); //wait MSSP idle
while(!PIR1bits.SSPIF);
if(SSPCON2bits.ACKSTAT) goto stop;
SSPBUF=0x00;
if (SSPCON1bits.WCOL) goto stop;
while(SSPSTATbits.BF); //wait until write cycle is complete
while ((SSPCON2 & 0x1F) | (SSPSTATbits.R_nW)); //wait MSSP idle
while(!PIR1bits.SSPIF);
if(SSPCON2bits.ACKSTAT) goto stop;
SSPBUF=0x39; //39H
if (SSPCON1bits.WCOL) goto stop;
while(SSPSTATbits.BF); //wait until write cycle is complete
while ((SSPCON2 & 0x1F) | (SSPSTATbits.R_nW)); //wait MSSP idle
while(!PIR1bits.SSPIF);
if(SSPCON2bits.ACKSTAT) goto stop;
SSPBUF=0x00;
if (SSPCON1bits.WCOL) goto stop;
while(SSPSTATbits.BF); //wait until write cycle is complete
while ((SSPCON2 & 0x1F) | (SSPSTATbits.R_nW)); //wait MSSP idle
while(!PIR1bits.SSPIF);
if(SSPCON2bits.ACKSTAT) goto stop;
SSPBUF=0x14; //14H
if (SSPCON1bits.WCOL) goto stop;
while(SSPSTATbits.BF); //wait until write cycle is complete
while ((SSPCON2 & 0x1F) | (SSPSTATbits.R_nW)); //wait MSSP idle
while(!PIR1bits.SSPIF);
if(SSPCON2bits.ACKSTAT) goto stop;
SSPBUF=0x00;
if (SSPCON1bits.WCOL) goto stop;
while(SSPSTATbits.BF); //wait until write cycle is complete
while ((SSPCON2 & 0x1F) | (SSPSTATbits.R_nW)); //wait MSSP idle
while(!PIR1bits.SSPIF);
if(SSPCON2bits.ACKSTAT) goto stop;
SSPBUF=0x79; //79H
if (SSPCON1bits.WCOL) goto stop;
while(SSPSTATbits.BF); //wait until write cycle is complete
while ((SSPCON2 & 0x1F) | (SSPSTATbits.R_nW)); //wait MSSP idle
while(!PIR1bits.SSPIF);
if(SSPCON2bits.ACKSTAT) goto stop;
SSPBUF=0x00;
if (SSPCON1bits.WCOL) goto stop;
while(SSPSTATbits.BF); //wait until write cycle is complete
while ((SSPCON2 & 0x1F) | (SSPSTATbits.R_nW)); //wait MSSP idle
while(!PIR1bits.SSPIF);
if(SSPCON2bits.ACKSTAT) goto stop;
SSPBUF=0x50; //50H
if (SSPCON1bits.WCOL) goto stop;
while(SSPSTATbits.BF); //wait until write cycle is complete
while ((SSPCON2 & 0x1F) | (SSPSTATbits.R_nW)); //wait MSSP idle
while(!PIR1bits.SSPIF);
if(SSPCON2bits.ACKSTAT) goto stop;
SSPBUF=0x00;
if (SSPCON1bits.WCOL) goto stop;
while(SSPSTATbits.BF); //wait until write cycle is complete
while ((SSPCON2 & 0x1F) | (SSPSTATbits.R_nW)); //wait MSSP idle
while(!PIR1bits.SSPIF);
if(SSPCON2bits.ACKSTAT) goto stop;
SSPBUF=0x6C; //6cH
if (SSPCON1bits.WCOL) goto stop;
while(SSPSTATbits.BF); //wait until write cycle is complete
while ((SSPCON2 & 0x1F) | (SSPSTATbits.R_nW)); //wait MSSP idle
while(!PIR1bits.SSPIF);
if(SSPCON2bits.ACKSTAT) goto stop;
SSPBUF=0x00;
if (SSPCON1bits.WCOL) goto stop;
while(SSPSTATbits.BF); //wait until write cycle is complete
while ((SSPCON2 & 0x1F) | (SSPSTATbits.R_nW)); //wait MSSP idle
while(!PIR1bits.SSPIF);
if(SSPCON2bits.ACKSTAT) goto stop;
SSPBUF=0b00001111; //DISPLAY ON
if (SSPCON1bits.WCOL) goto stop;
while(SSPSTATbits.BF); //wait until write cycle is complete
while ((SSPCON2 & 0x1F) | (SSPSTATbits.R_nW)); //wait MSSP idle
while(!PIR1bits.SSPIF);
if(SSPCON2bits.ACKSTAT) goto stop;
SSPBUF=0x00;
if (SSPCON1bits.WCOL) goto stop;
while(SSPSTATbits.BF); //wait until write cycle is complete
while ((SSPCON2 & 0x1F) | (SSPSTATbits.R_nW)); //wait MSSP idle
while(!PIR1bits.SSPIF);
if(SSPCON2bits.ACKSTAT) goto stop;
SSPBUF=0b00000001; //CLEAR DISPLAY
if (SSPCON1bits.WCOL) goto stop;
while(SSPSTATbits.BF); //wait until write cycle is complete
while ((SSPCON2 & 0x1F) | (SSPSTATbits.R_nW)); //wait MSSP idle
while(!PIR1bits.SSPIF);
if(SSPCON2bits.ACKSTAT) goto stop;
SSPBUF=0x00;
if (SSPCON1bits.WCOL) goto stop;
while(SSPSTATbits.BF); //wait until write cycle is complete
while ((SSPCON2 & 0x1F) | (SSPSTATbits.R_nW)); //wait MSSP idle
while(!PIR1bits.SSPIF);
if(SSPCON2bits.ACKSTAT) goto stop;
SSPBUF=0b00000010; //RETURN HOME
if (SSPCON1bits.WCOL) goto stop;
while(SSPSTATbits.BF); //wait until write cycle is complete
while ((SSPCON2 & 0x1F) | (SSPSTATbits.R_nW)); //wait MSSP idle
while(!PIR1bits.SSPIF);
if(SSPCON2bits.ACKSTAT) goto stop;
stop:
SSPCON2bits.PEN = 1;//initiate stop sequence
while (SSPCON2bits.PEN);
__delay_ms(30);__delay_ms(30);__delay_ms(30);__delay_ms(30);
}
}