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*(SOLVED)* - Can't make some inputs work? PIC18F45K50

PostPosted: Tue Sep 14, 2021 8:22 am
by PICFORTHEWIN
Hi Guys,

I have tried everything I know with this one. I have used many PICs over the years but the PIC18F45K50-I/P (dip 40p) is new to me so that's likely most of my problem. I am writing in assembler and using MPLAB IDE v8.92 (I can't understand MPLABX, it's too complex for my small brain).

I have the chip working, driving things as well as some inputs working BUT for the life of me I just cannot get RA0 (pin 2) and RA1 (pin 3) to 'see' any change applied to the pin.

Any suggestions most welcome - a code snippet here with (hopefully) the area of interest in there somewhere:

**********************************************
LIST P=PIC18F45K50 ;DEFINE PROCESSOR
#INCLUDE <P18F45K50.inc> ;INCLUDE DEFAULTS

ERRORLEVEL -302
ERRORLEVEL -305 ;W OR F ERROR

CONFIG WDTEN = OFF ;disable watchdog timer
CONFIG MCLRE = OFF ;MCLEAR Pin on RE3 - OFF
CONFIG DEBUG = OFF ;DISABLE Debug Mode
CONFIG LVP = OFF ;Low-Voltage programming disabled
CONFIG FOSC = INTOSCIO ;Internal oscillator, port function on RA6
CONFIG BOREN = OFF ;BROWN OUT DETECTOR OFF
CONFIG PBADEN = OFF ;FORCE PORT B PINS TO BE DIGITAL AT BOOT
CONFIG XINST = OFF ;EXTENDED INSTRUCTION SET OFF - MIGHT NOT BE NEEDED?

ORG 0x00
GOTO INIT
ORG 0X08
GOTO INIT
ORG 0X18
GOTO INIT

INIT

CBLOCK 0x00
DELAY1
DELAY2
ENDC

MOVLW B'01010100' ;SET OSC FOR 4MHZ
MOVWF OSCCON

CLRF LATA
CLRF ANSELA ;ALL PORTS DIGITAL
MOVLW B'00000011'
MOVWF TRISA
CLRF LATB
CLRF ANSELB ;ALL PORTS DIGITAL
MOVLW B'00000000'
MOVWF TRISB
CLRF LATC
CLRF ANSELC ;ALL PORTS DIGITAL
MOVLW B'00000011'
MOVWF TRISC
CLRF LATD
CLRF ANSELD ;ALL PORTS DIGITAL
MOVLW B'00000000'
MOVWF TRISD
CLRF LATE
CLRF ANSELE ;ALL PORTS DIGITAL
MOVLW B'00001111'
MOVWF TRISE



#DEFINE GO_UP PORTE,3 ;PIN 1 MCLR, TIED HIGH WITH 47K
#DEFINE ENTER PORTA,0 ;PIN 2 INPUT TEST BUTTON ENTER TIED HIGH WITH 10K
#DEFINE TEST PORTA,1 ;PIN 3 INPUT TEST BUTTON TEST TIED HIGH WITH 10K


code continues from here - cut to the 'read the input' section using simple code to read the input pin here:


START
BTFSC TEST ;USING ENTER OR TEST HERE ISN'T RECOGNISED - GO_UP WORKS PERFECTLY AND AS EXPECTED
GOTO START






**************************************************************************

Re: Can't make some inputs work? PIC18F45K50

PostPosted: Tue Sep 14, 2021 9:52 am
by Roche
You may want to check that you have the bank select register configured correctly to access the registers addressed during INIT...
Using the simulator can be quite a help here...

Re: Can't make some inputs work? PIC18F45K50

PostPosted: Tue Sep 14, 2021 11:11 am
by PICFORTHEWIN
You are dead right! Thankyou - data sheet is pretty cryptic about bank changing and I thought it wasn't required with PIC18 devices- there you go!

I don't have it quite right yet but will attempt to glean the exact code needed from the data sheet.

Re: Can't make some inputs work? PIC18F45K50

PostPosted: Tue Sep 14, 2021 11:19 am
by Roche
You're welcome.

Re: Can't make some inputs work? PIC18F45K50

PostPosted: Thu Sep 16, 2021 4:50 am
by ric
PICFORTHEWIN wrote:You are dead right! Thankyou - data sheet is pretty cryptic about bank changing and I thought it wasn't required with PIC18 devices- there you go!

It is only "not necessary" for registers which are in the "Access bank"
These new devices have so many registers, they don't all fit in there.
In the datasheet, "6.4.3 ACCESS BANK" tells you that in the Access bank, 00-5F is RAM, and 60-FF is SFRs.
That means SFRs in the address range 0xF60-0xFF can be accessed without worrying about banks.
Look at "TABLE 6-1: SPECIAL FUNCTION REGISTER MAP FOR PIC18(L)F2X/45K50 DEVICES" and you will see there are some SFRs in the range 0xF57 to 0xF5F.
Those registers can only be accessed through banked memory, and it includes all the ANSELx registers.
This is reasonable, as they are often only written to once in your init code.

Re: Can't make some inputs work? PIC18F45K50

PostPosted: Fri Sep 17, 2021 7:48 am
by MarcoAmara
Roche wrote:You may want to check that you have the bank select register configured correctly to access the registers addressed during INIT...
Using the simulator can be quite a help here...

This solved.The bank select register must be configured correctly.