On the PIC18F67J94, pins RC0 and RC1 are available for use as secondary oscillator i/o. I wish to use them for digital IO, but am having a difficult time with the configuration.
Per the family data sheet, these pins are configured as digital inputs upon any device reset. I suspect I am spoiling that with the configuration settings (below), but I can't see where.
There is an item I don't understand in the possible config settings. Per mplab, SOSCEL has just two options: either "Low Power T1OSC/SOSC circuit selected" or "Digital (SCLKIL mode". Is the SOSCEL setting ignored unless one also configures, for example, FOSC = SOSC?
I have TRISC = 0x00;
and the following will change all RC bits except RC0,1. Those pins remain at 0V.
LATC = 0xFF
LATC - 0x00;
- Code: Select all
#pragma config STVREN = ON // Stack overflow reset
#pragma config XINST = OFF // Extended instruction set
#pragma config BOREN = ON // BOR Enabled
#pragma config BORV = 0 // BOR Set to "2.0V" nominal setting
#pragma config CP0 = OFF // Code protect disabled
#pragma config FOSC = FRCPLL // Firmware should also enable active clock tuning for this setting
//#pragma config SOSCSEL = LOW // SOSC circuit configured for crystal driver mode
//#pragma config SOSCSEL = DIG // DIG -> Digital (SCLKI) mode
#pragma config CLKOEN = OFF // Disable clock output on RA6
#pragma config IESO = OFF // Internal External (clock) Switchover
#pragma config PLLDIV = NODIV // 4 MHz input (from 8MHz FRC / 2) provided to PLL circuit
#pragma config POSCMD = NONE // Primary osc disabled, using FRC
#pragma config FSCM = CSECMD // Clock switching enabled, fail safe clock monitor disabled
#pragma config WPDIS = WPDIS // Program memory not write protected
#pragma config WPCFG = WPCFGDIS // Config word page of program memory not write protected
#pragma config IOL1WAY = OFF // IOLOCK can be set/cleared as needed with unlock sequence
#pragma config LS48MHZ = SYSX2 // Low Speed USB clock divider
#pragma config WDTCLK = LPRC // WDT always uses INTOSC/LPRC oscillator
#pragma config WDTEN = ON // WDT disabled; SWDTEN can control WDT
#pragma config WINDIS = WDTSTD // Normal non-window mode WDT.
#pragma config VBTBOR = OFF // VBAT BOR disabled
Steve