I am able to detect RC0 and RC1 as high when their switches are pressed. RC2 is always detected as low in software, even when its switch is pressed. I have confirmed that the physical pin for RC2 is at 5v when the switch is pressed.
I have cleared ANSELC and set bits 0-2 in TRISC.
I tried a second PIC18F24K22, but had the same results.
RC2 is shared with CCP1, P1A, CTPLS and T5CKI. I have cleared CCP1CON, the CTMUEN and EDGEN bits in CTMUCONH, the TMR5ON bit in T5CON and the TMR5GE bit in T5GCON.
I still couldn't detect RC2 going high in software, so I cleared bit TMR5MD in PMD0, bit CCP1MD in PMD1 and bit CTMUMD in PMD2.
The code is shown below. There was much more there, but I commented most of it out to try to resolve this issue. I excluded the commented code. I placed a breakpoint on each of the 3 "GOTO BtnEnd" lines to detect when the switches are pressed. The program halts when the switch on RC0 or RC1 is pressed, but not when the switch on RC2 is pressed.
Thanks in advance for any advice that you can give me.
-Andrew
- Code: Select all
;*******************************************************************************
; *
; Filename: *
; Date: *
; File Version: *
; Author: *
; Company: *
; Description: *
; *
;*******************************************************************************
; *
; Notes: In the MPLAB X Help, refer to the MPASM Assembler documentation *
; for information on assembly instructions. *
; *
;*******************************************************************************
; *
; Known Issues: This template is designed for relocatable code. As such, *
; build errors such as "Directive only allowed when generating an object *
; file" will result when the 'Build in Absolute Mode' checkbox is selected *
; in the project properties. Designing code in absolute mode is *
; antiquated - use relocatable mode. *
; *
;*******************************************************************************
; *
; Revision History: *
; *
;*******************************************************************************
;*******************************************************************************
; Processor Inclusion
;
; TODO Step #1 Open the task list under Window > Tasks. Include your
; device .inc file - e.g. #include <device_name>.inc. Available
; include files are in C:\Program Files\Microchip\MPLABX\mpasmx
; assuming the default installation path for MPLAB X. You may manually find
; the appropriate include file for your device here and include it, or
; simply copy the include generated by the configuration bits
; generator (see Step #2).
;
;*******************************************************************************
#include <p18f24k22.inc>
;*******************************************************************************
;
; TODO Step #2 - Configuration Word Setup
;
; The 'CONFIG' directive is used to embed the configuration word within the
; .asm file. MPLAB X requires users to embed their configuration words
; into source code. See the device datasheet for additional information
; on configuration word settings. Device configuration bits descriptions
; are in C:\Program Files\Microchip\MPLABX\mpasmx\P<device_name>.inc
; (may change depending on your MPLAB X installation directory).
;
; MPLAB X has a feature which generates configuration bits source code. Go to
; Window > PIC Memory Views > Configuration Bits. Configure each field as
; needed and select 'Generate Source Code to Output'. The resulting code which
; appears in the 'Output Window' > 'Config Bits Source' tab may be copied
; below.
;
;*******************************************************************************
; CONFIG1H
CONFIG FOSC = INTIO67 ; Oscillator Selection bits (Internal oscillator block)
CONFIG PLLCFG = OFF ; 4X PLL Enable (Oscillator used directly)
CONFIG PRICLKEN = ON ; Primary clock enable bit (Primary clock enabled)
CONFIG FCMEN = OFF ; Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
CONFIG IESO = OFF ; Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
; CONFIG2L
CONFIG PWRTEN = ON ; Power-up Timer Enable bit (Power up timer enabled)
CONFIG BOREN = SBORDIS ; Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
CONFIG BORV = 190 ; Brown Out Reset Voltage bits (VBOR set to 1.90 V nominal)
; CONFIG2H
CONFIG WDTEN = OFF ; Watchdog Timer Enable bits (Watch dog timer is always disabled. SWDTEN has no effect.)
CONFIG WDTPS = 32768 ; Watchdog Timer Postscale Select bits (1:32768)
; CONFIG3H
CONFIG CCP2MX = PORTC1 ; CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
CONFIG PBADEN = ON ; PORTB A/D Enable bit (PORTB<5:0> pins are configured as analog input channels on Reset)
CONFIG CCP3MX = PORTB5 ; P3A/CCP3 Mux bit (P3A/CCP3 input/output is multiplexed with RB5)
CONFIG HFOFST = ON ; HFINTOSC Fast Start-up (HFINTOSC output and ready status are not delayed by the oscillator stable status)
CONFIG T3CMX = PORTC0 ; Timer3 Clock input mux bit (T3CKI is on RC0)
CONFIG P2BMX = PORTB5 ; ECCP2 B output mux bit (P2B is on RB5)
CONFIG MCLRE = EXTMCLR ; MCLR Pin Enable bit (MCLR pin enabled, RE3 input pin disabled)
; CONFIG4L
CONFIG STVREN = ON ; Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
CONFIG LVP = OFF ; Single-Supply ICSP Enable bit (Single-Supply ICSP enabled if MCLRE is also 1)
CONFIG XINST = OFF ; Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
; CONFIG5L
CONFIG CP0 = OFF ; Code Protection Block 0 (Block 0 (000800-001FFFh) not code-protected)
CONFIG CP1 = OFF ; Code Protection Block 1 (Block 1 (002000-003FFFh) not code-protected)
; CONFIG5H
CONFIG CPB = OFF ; Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
CONFIG CPD = OFF ; Data EEPROM Code Protection bit (Data EEPROM not code-protected)
; CONFIG6L
CONFIG WRT0 = OFF ; Write Protection Block 0 (Block 0 (000800-001FFFh) not write-protected)
CONFIG WRT1 = OFF ; Write Protection Block 1 (Block 1 (002000-003FFFh) not write-protected)
; CONFIG6H
CONFIG WRTC = OFF ; Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
CONFIG WRTB = OFF ; Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
CONFIG WRTD = OFF ; Data EEPROM Write Protection bit (Data EEPROM not write-protected)
; CONFIG7L
CONFIG EBTR0 = OFF ; Table Read Protection Block 0 (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
CONFIG EBTR1 = OFF ; Table Read Protection Block 1 (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
; CONFIG7H
CONFIG EBTRB = OFF ; Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)
;*******************************************************************************
;
; TODO Step #3 - Variable Definitions
;
; Refer to datasheet for available data memory (RAM) organization assuming
; relocatible code organization (which is an option in project
; properties > mpasm (Global Options)). Absolute mode generally should
; be used sparingly.
;
; Example of using GPR Uninitialized Data
;
; GPR_VAR UDATA
; MYVAR1 RES 1 ; User variable linker places
; MYVAR2 RES 1 ; User variable linker places
; MYVAR3 RES 1 ; User variable linker places
;
; ; Example of using Access Uninitialized Data Section (when available)
; ; The variables for the context saving in the device datasheet may need
; ; memory reserved here.
; INT_VAR UDATA_ACS
; W_TEMP RES 1 ; w register for context saving (ACCESS)
; STATUS_TEMP RES 1 ; status used for context saving
; BSR_TEMP RES 1 ; bank select used for ISR context saving
;
;*******************************************************************************
UDATA
ADCvalue RES 2
MainTemp RES 2
MainTempSP RES 2
ElementTemp RES 2
ElementTempSP RES 2
BCDvalH RES 1
BCDvalM RES 1
BCDvalL RES 1
MCount RES 1
NumbHi RES 1
NumbLo RES 1
Temp RES 2
Flags RES 1
ErrorValue RES 1
DigitSelected RES 1
DisplayValue RES 2
SPDisplayValue RES 2
DispValFlags RES 1
BtnLockoutCount RES 1
SPSetCount RES 1
Augend RES 2
Addend RES 2
Subtrahend RES 2
Minuend RES 2
BCDSubFlags RES 1
TableOffset RES 1
#define RelayPin PORTC,RC3
#define DisplayPort PORTA
#define DigitSelectPort PORTC
#define Digit1 PORTC,RC7
#define Digit2 PORTC,RC6
#define Digit3 PORTC,RC5
#define Digit4 PORTC,RC4
#define ModeLED PORTB,RB3
#define ErrorLED PORTB,RB4
#define StatusLED PORTB,RB5
#define ModeBtn PORTC,RC0
#define UpBtn PORTC,RC1
#define DownBtn PORTC,RC2
#define FloatSwitch PORTB,RB2
#define MainTempSensor PORTB,AN12
#define MainTempSensorAnalog ANSELB,AN12
#define ElementTempSensor PORTB,AN10
#define ElementTempSensorAnalog ANSELB,AN10
#define ConvertADCValuePtrL H'00'
#define ConvertADCValuePtrH H'04'
#define ConvertADCValuePtrU H'00'
#define DefaultMainTempL H'50'
#define DefaultMainTempH H'08'
#define DefaultElementTempL H'00'
#define DefaultElementTempH H'12'
#define MainTempEEADR H'4'
#define ElementTempEEADR H'6'
#define Mode H'0' ; 0=Thermometer, 1=Thermostat
#define DisplayMode H'1' ; 0=Display Temperature, 1=Display Set-Point
#define AdjustSetPoint H'2' ; 0=Main Temp., 1=Element Temp.
#define TemperatureDisplay H'3' ; 0=Main Temp., 1=Element Temp.
#define ModeBtnLockout H'4' ; 0=Disabled, 1=Enabled
#define UpBtnLockout H'5' ; 0=Disabled, 1=Enabled
#define DownBtnLockout H'6' ; 0=Disabled, 1=Enabled
#define SPSetExpired H'7' ; 0=False, 1=True
#define DigitSelectMask B'00001111' ; 0=Bit to clear, 1=Bit to remain unchanged
#define LowDigitCarry H'0' ; Digit Carry from low byte of DisplayValue
#define LowCarry H'1' ; Carry from low byte of DisplayValue
#define HighDigitCarry H'2' ; Digit Carry from high byte of DisplayValue
;*******************************************************************************
; Reset Vector
;*******************************************************************************
RES_VECT CODE 0x0000 ; processor reset vector
GOTO START ; go to beginning of program
;*******************************************************************************
; TODO Step #4 - Interrupt Service Routines
;
; There are a few different ways to structure interrupt routines in the 8
; bit device families. On PIC18's the high priority and low priority
; interrupts are located at 0x0008 and 0x0018, respectively. On PIC16's and
; lower the interrupt is at 0x0004. Between device families there is subtle
; variation in the both the hardware supporting the ISR (for restoring
; interrupt context) as well as the software used to restore the context
; (without corrupting the STATUS bits).
;
; General formats are shown below in relocatible format.
;
;------------------------------PIC16's and below--------------------------------
;
; ISR CODE 0x0004 ; interrupt vector location
;
; <Search the device datasheet for 'context' and copy interrupt
; context saving code here. Older devices need context saving code,
; but newer devices like the 16F#### don't need context saving code.>
;
; RETFIE
;
;----------------------------------PIC18's--------------------------------------
;
; ISRHV CODE 0x0008
; GOTO HIGH_ISR
; ISRLV CODE 0x0018
; GOTO LOW_ISR
;
; ISRH CODE ; let linker place high ISR routine
; HIGH_ISR
; <Insert High Priority ISR Here - no SW context saving>
; RETFIE FAST
;
; ISRL CODE ; let linker place low ISR routine
; LOW_ISR
; <Search the device datasheet for 'context' and copy interrupt
; context saving code here>
; RETFIE
;
;*******************************************************************************
ISRHV CODE 0x0008
GOTO HIGH_ISR
;ISRLV CODE 0x0018
; GOTO LOW_ISR
ISRH CODE ; let linker place high ISR routine
HIGH_ISR
; <Insert High Priority ISR Here - no SW context saving>
BCF INTCON,TMR0IF ; Clear Timer0 Interrupt Flag
RETFIE FAST
;*******************************************************************************
; MAIN PROGRAM
;*******************************************************************************
MAIN_PROG CODE ; let linker place main program
START
; Initialize Variables
CLRF Flags
; Set up Digital Pins
CLRF PORTA
CLRF ANSELA
CLRF PORTB
CLRF ANSELB
CLRF PORTC
CLRF ANSELC
CLRF TRISA
MOVLW B'00000111'
MOVWF TRISB
MOVLW B'00000111'
MOVWF TRISC
MOVLW B'10000000'
MOVWF DigitSelected
CLRF CCP1CON
CLRF CCP2CON
CLRF CCP3CON
BCF CTMUCONH,CTMUEN
BCF CTMUCONH,EDGEN
BCF T5CON,TMR5ON
BCF T5GCON,TMR5GE
BCF PMD0,TMR5MD
BCF PMD1,CCP1MD
BCF PMD2,CTMUMD
MOVLW B'00000111'
MOVWF TRISC
MAIN
BTFSC ModeBtn
GOTO BtnEnd
BTFSC UpBtn
GOTO BtnEnd
BTFSC DownBtn
GOTO BtnEnd
BtnEnd
GOTO MAIN
END