CLRWDT(); Not Recognized?

[SLTom992]

Can anyone think of any reason that CLRWDT() would suddenly stop being recognized?

I changed some display functions in Display.c and again re-wrote the prototypes into Detector.h.

I changed the names of the display functions in Detector.c that were operating with different names.

Now I get the compile error: :0: error: undefined symbols:

There appears to be no error marked except CLRWDT(); with the message "Unable to resolve identifier"

In case there was some problem with the new display functions I commented them out.

In detector.c there are comments from line 1 to line 36

Starting at line 38:

#include <xc.h>
#include <stdlib.h>

// CONFIG2H
#pragma config WDTEN = ON // Watchdog Timer Enable bits (WDT is always enabled. SWDTEN bit has no effect)
#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)

I've rechecked all of the prototypes to make sure that they aren't misspelled or missing a semi-colon. Since nothing is being called
between the .c files I don't suppose the spelling could be a problem. The .h file only contains the prototypes.

[ric]

As you can't show us the full source, your best option is to start removing stuff until either:
[1] It starts working again (so the last thing removed is the cause)
or
[2] All your customer's code is gone, so you can show us the files.

[SLTom992]

This code gives the error code:
:0: error: undefined symbol:

And there is an error mark on CLRWDT();

Code: Select all


// PIC18F45K22 Configuration Bit Settings

// 'C' source line config statements

#include <xc.h>
#include <stdlib.h>
#include "Detector.h"

// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.

// CONFIG1H
#pragma config FOSC = XT        // Oscillator Selection bits (XT oscillator)
#pragma config PLLCFG = OFF     // 4X PLL Enable (Oscillator used directly)
#pragma config PRICLKEN = ON    // Primary clock enable bit (Primary clock is always enabled)
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRTEN = OFF     // Power-up Timer Enable bit (Power up timer disabled)
#pragma config BOREN = SBORDIS  // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
#pragma config BORV = 190       // Brown Out Reset Voltage bits (VBOR set to 1.90 V nominal)

// CONFIG2H
#pragma config WDTEN = ON       // Watchdog Timer Enable bits (WDT is always enabled. SWDTEN bit has no effect)
#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H
#pragma config CCP2MX = PORTC1  // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = ON      // PORTB A/D Enable bit (PORTB<5:0> pins are configured as analog input channels on Reset)
#pragma config CCP3MX = PORTB5  // P3A/CCP3 Mux bit (P3A/CCP3 input/output is multiplexed with RB5)
#pragma config HFOFST = ON      // HFINTOSC Fast Start-up (HFINTOSC output and ready status are not delayed by the oscillator stable status)
#pragma config T3CMX = PORTC0   // Timer3 Clock input mux bit (T3CKI is on RC0)
#pragma config P2BMX = PORTD2   // ECCP2 B output mux bit (P2B is on RD2)
#pragma config MCLRE = EXTMCLR  // MCLR Pin Enable bit (MCLR pin enabled, RE3 input pin disabled)

// CONFIG4L
#pragma config STVREN = ON      // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = ON         // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled if MCLRE is also 1)
#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L
#pragma config CP0 = OFF        // Code Protection Block 0 (Block 0 (000800-001FFFh) not code-protected)
#pragma config CP1 = OFF        // Code Protection Block 1 (Block 1 (002000-003FFFh) not code-protected)
#pragma config CP2 = OFF        // Code Protection Block 2 (Block 2 (004000-005FFFh) not code-protected)
#pragma config CP3 = OFF        // Code Protection Block 3 (Block 3 (006000-007FFFh) not code-protected)

// CONFIG5H
#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF       // Write Protection Block 0 (Block 0 (000800-001FFFh) not write-protected)
#pragma config WRT1 = OFF       // Write Protection Block 1 (Block 1 (002000-003FFFh) not write-protected)
#pragma config WRT2 = OFF       // Write Protection Block 2 (Block 2 (004000-005FFFh) not write-protected)
#pragma config WRT3 = OFF       // Write Protection Block 3 (Block 3 (006000-007FFFh) not write-protected)

// CONFIG6H
#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protection Block 0 (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF      // Table Read Protection Block 1 (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF      // Table Read Protection Block 2 (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF      // Table Read Protection Block 3 (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)

// Prperties and definitions

// Definitions


#define LOW 0
#define HIGH 1
#define FALSE 0
#define TRUE 1
#define SLOW 0
#define FAST 1
#define TRUE_ON 1
#define TRUE_OFF 2
#define OUTPUT 0
#define INPUT 1
#define HALF_SEC 500
#define ONE_SEC 1000
#define NO 0
#define YES 1
#define FALLING 0
#define RISING 1
#define OFF 0
#define ON 1
#define G0 1
#define DONE 0

//------------------prototypes---------------------------------------------


// Variables
//--------------------------------------------------------------------------

// variables for the ADC structures and input
// Other variables

//------------------------------------------------------------------------
// Below are the LED names.

//bit RB2   power_norm               // Grn power OK
//bit RB3   power_low                // Both power low Red power gone
//bit RB4   uCrunning                // Red heartbeat no leak
//bit RB5   sync                     // Grn heartbeat and leak


// Normal pre-load on-off periods in msec

// Normal pre-load on-off periods in msec


//-----------------------------------------------------------------------
// Procedures and functions


void main () {

    char ad_flag = FALSE;           // Counter
    char long_term_test = 0;        // Used for good battery level
    char lsb_gen;
    char a = 0;                     // Test byte

    // Initialize PORTs

    TRISA = 0b00000011;
    TRISB = 0b11000001;
    TRISC = 0b01110000;             // SDO no output and SCK output
    TRISD = 0b00000000;
    TRISE = 0b00001000;

    ANSELA = 0x03;
    ANSELB = 0;
    ANSELC = 0;
    ANSELD = 0;

    // Initialize the LTC2440 24 Bit ADC
 
    PORTC = 0b00100000;             // Bit 0 high = lowest speed conversion A-D
    PORTB = 0b00000000;             // RB0 input for external input
   
    // Intialize MPU Serial Port 1 into Master Mode

    SSP1CON1 = 0b00100000;          // Enable SSP SCK normally low
    SSP1STAT = 0b00000000;          // CKE = clock polarity 0->1

//    // ===================================================================
    // Initialize PWM1 output used for audio output ======================
    // ===================================================================

// Initialize PWM output==========================
    TRISCbits.TRISC2 = INPUT; // Disable CCP output (verified as "1")

    // Suggestion from Forum
    // These two default to these values on reset anyway
//    ECCP2AS = 0; // PWM Shutdown disabled
//    PMD1 = 0; // (normal default setting)

    // Timer Setup
    TMR4 = 0;
    T4CONbits.T4CKPS1 = 1; // /16 prescaler
    T4CONbits.TMR4ON = YES; // tmr on

        // Set up CCP/PWM registers
    PR4 = 0x3E; // Set compare period.

    CCPR1L = (PR4 >> 1); // Set pulse width
    CCP1CONbits.DC1B = 2; // lsbs of pulse width

    CCPTMRS0bits.C1TSEL = 1; // Select timer 4
    CCP1CONbits.CCP1M = 0x0C; // set to PWM Mode

    // flag gets set at compare regardless of interrupt enable or not
    // this does not trigger an interrupt so should be immaterial

    // This is done only so that initial PWM is correct pulse width
    while (!TMR4IF);
    TMR4IF = FALSE; // No timer interrupt - freerunning

    TRISCbits.TRISC2 = OUTPUT; // Enable CCP output (verified as "0")

    // ===================== End of PWM 1 Audio Out ======================
    // ===================================================================

    // ===================================================================
    // Initialize PWM2 output used for LINX output =======================
    // ===================================================================

// Initialize PWM output==========================
    TRISCbits.TRISC1 = INPUT; // Disable CCP output (verified as "1")

    // Suggestion from Forum
    // These two default to these values on reset anyway
    ECCP2AS = 0; // PWM Shutdown disabled
    PMD1 = 0; // (normal default setting)

    // Timer Setup
    TMR2 = 0;
    T2CONbits.T2CKPS1 = 1; // /16 prescaler
    T2CONbits.TMR2ON = YES; // tmr on

        // Set up CCP/PWM registers
    PR2 = 0x4E; // Set compare period.

    CCPR2L = (PR2 >> 1); // Set pulse width
    CCP2CONbits.DC2B = 2; // lsbs of pulse width

    CCPTMRS0bits.C2TSEL = 0; // Select timer 4
    CCP2CONbits.CCP2M = 0x0C; // set to PWM Mode

    // flag gets set at compare regardless of interrupt enable or not
    // this does not trigger an interrupt so should be immaterial

    // This is done only so that initial PWM is correct pulse width
    while (!TMR2IF);
    TMR2IF = FALSE; // No timer interrupt - freerunning

    TRISCbits.TRISC1 = OUTPUT; // Enable CCP output (verified as "0")

    // ===================== End of PWM 2 LINX Out =======================
    // ===================================================================

    // Initialize all interrupts.
    INTCON2bits.INTEDG0 = FALLING;
    INTCONbits.INT0F = FALSE;
    INTCONbits.RBIF = FALSE;
    INTCONbits.INT0E = TRUE;
    INTCONbits.RBIE = TRUE;
    TMR3H = 0xFC;                   // SET high timer for 1 msec
    TMR3L = 0x18;                   // FC18 == 1 mSec to rollover
    RCON = 0b10000000;              // Asociated with Watchdog

    IPR2 = 0b00000010;              // tmr3 interrupt IP (not ness.)
    PIE2 = 0b00000010;              // TMR3IE
    T3CON = 0b00000001;             // TMR3 ON
    TMR3ON = TRUE;                  // Turn Timer on
    INT0IE = TRUE;
    GIE = TRUE;
 
     // Initialize OLED
    // OLED with be communicated with parallel port for speed

// Iniialize ADC for power level monitor

    ADCON0 = 0b00000101;                // ADC 1 Enabled
    ADCON1 = 0b00000000;                // V ref = power and ground
    ADCON2 = 0b00111110;                //

    INT0IF = FALSE;

    while (1) {

        CLRWDT();
    }
}


[ric]

Are you getting compile errors, or just a red underline in the MPLABX editor?

The editor is buggy, and does that to a number of valid macros. Only be concerned if the compiler complains.

[SLTom992]

I get the error message on compile as reported and a red dot next to the CLRWDT() and the program will not compile.

All worked well this morning and the only changes were to the Display.C file and the Detector.c still gets the same errors with no calls to Display.

[jtemples]

Without detector.h, no one else can compile it.

[ric]

I don't think it requires anything from dectector.h, so Tom, please try removing that line yourself.

[jtemples]

I cut-and-pasted it, removed the include of Detector.h, and it compiles fine with XC8 1.21.

[SLTom992]

Too bad no one knows what ":0: error: undefined symbol:" means.

[mosquito]

It means that the linker can't find the symbol in the compiled object files / libraries.
Maybe a path issue?