hi guys...
i have a problem with spi master and slave communication.
i have one master and three slaves. pics are 18f452.
when i send data from master slaves read properly.
but but when try to send data from slave it seems like data shifted rigth
and when i try shift left before send data on the master side it adds 1 to 7th bit.
S is 0b01010011
it becames 0b11010011 on master.
i make &0b01111111 on master side. but this will loose 7th bit
headers are from microchip standard.
and all necessary lines are connected.
here is the master:
while (1) {
unsigned temp = SSPBUF;
ss1 = 0;
Delay10KTCYx(10);
SSPBUF = 40; // junk
while (!BF);
PORTD = (SSPBUF & 0b01111111);
Delay10KTCYx(10);
ss1 = 1;
here is the slave....
void interrupt ISR()
{
if (SPI_Intr_Status == 1)
{
if (SSPOV)
{
SSPOV = 0;
}
else
{
if (SSPSTATbits.BF)
{
PORTD = SSPBUF;
SSPBUF = ('S'<<1);
}
}
SPI_Clear_Intr_Status_Bit;
}
}
any help will be nice